PAT-Noxim - NoC Simulator

Networks-on-Chip have proven low-latency and highly scalable in many-core architectures. Because scalability matters so much, designers try to optimise latency, power and temperature across the network - so developing a precise tool to calculate those attributes is of real importance.

Designers need to evaluate proposed techniques in a simulated NoC environment. PAT-Noxim addresses shortcomings at both the design and post-design stages. Developed on top of Access-Noxim, it provides an environment to simulate a NoC across power consumption, area, delay and temperature models, and supports several predefined and custom architectures.