Conference papers 2019First author

An Efficient Sorting Architecture for Area and Energy Constrained Edge Computing Devices

Authors:A. NorollahZ. KazemiH. Beitollahi

Some edge devices hand basic operations like sorting to small hardware modules so the processor can do other work. Existing hardware sorters, though, cost too much area and energy for that setting. We designed a sorter for edge devices based on the bitonic algorithm, running compare-and-swap operations in parallel and using unary processing to keep hardware and energy use down. The synthesis results are in the paper.