Journal articles 2020

HRHS: A High-Performance Real-Time Hardware Scheduler

Authors:D. DerafshiA. NorollahM. KhosroanjamH. Beitollahi

On a many-core chip, a software scheduler can spend thousands of clock cycles on each decision. HRHS moves scheduling into hardware and splits the main scheduler into identical partial schedulers, so it scales with the number of cores and its timing stays predictable. Each partial scheduler runs EDF in this work, but the policy can be swapped for another. We implemented it on FPGA and in 45 nm ASIC; the comparison with conventional and clustered schedulers is in the paper.